Comprehensive

Gets comprehensive architecture information Creates a complete ArchitectureInfo structure containing all detected architectural characteristics. This provides a unified view of the system's capabilities including architecture type, endianness, pointer size, and performance-related information.

Information Provided

• Architecture Type: Specific CPU architecture family and variant
• Byte Order: System endianness for data serialization
• Pointer Size: Address space size (32/64-bit) for memory management
• Cache Line Size: Typical cache line size for alignment optimization
• Architecture Name: Human-readable identifier for debugging/logging

Use Cases

• Performance Optimization: Cache-line alignment, SIMD detection
• Memory Management: Pointer size awareness, alignment requirements
• Cross-Platform Code: Architecture-specific algorithm selection
• Debug/Logging: Human-readable architecture identification

Returns

ArchitectureInfo structure with all detected architectural information

Note

This function is constexpr and evaluates at compile time

See also

getCpuArchitecture() for simple architecture detection

ArchitectureInfo for structure member documentation

architecture analysis

constexpr auto info = trlc::platform::getArchitectureInfo();
 
// Architecture-specific optimizations
if constexpr (info.isX86() && info.is64Bit()) {
    // x86_64 specific code
} else if constexpr (info.isARM() && info.hasSimdSupport()) {
    // ARM with NEON optimizations
}
 
// Cache-line aligned allocation
alignas(info.cache_line_size) char buffer[1024];
 
// Debug output
std::cout << "Running on " << info.arch_name
          << " (" << info.pointer_size_bits << "-bit)" << std::endl;

Since

1.0.0